NetBurner Community Forum

Anyone have a code example for accessing external memory on the MODM7AE70 board?

Setting up the chip selects, wait states , etc...

Hi,

NNDK 3.1 has an EBI example in it. ( ..\nburn\examples\PlatformSpecific\MODM7AE70\EBI_Paging )
The external bus buffer enable is missing from this example but has been added for the next release. Just include bsp.h and call EnableExtBusBuff(true) from UserMain in your initialization.

The important bit from this example for using the EBI is the function ConfigureEBI_CS. To fully understand the config struct passed into this function you should look at the header for the EBI driver ( ..\nburn\arch\CORTEX_M7\cpu\SAME70\include\ebi.h ). You will also likely need to brief through the E70 datasheet chapter 35 (SMC Static Memory Controller ). This explains in much greater detail how all the various configuration settings effect the bus operation.

The included example also includes a paging system driven by the MPU. This will replace any missing hardware address lines with GPIO that are controlled by the MPU to give access to the full 24-bit address space without the need to manually controlling the GPIO paging lines. While this paging system is pretty useful if you need it, it also adds a bit of complexity to the example. The next release of the NNDK has a simple EBI example which is very similar but omits the paging aspect. All that is really needed for the EBI to function is the EnableExtBusBuff and ConfigureEBI_CS functions.

-Larry

Using the memory example, writing to memory works but for some reason when reading from memory it causes a SIGILL:illegal instruction.... what is odd is that CS0, CS2, and CS3 will cause the illegal instruction. CS1 reading will not cause a the fault.

EBIdata = ebi_1_base[8666];
ebi_2_base[6146] = EBIdata;
EBIdata = ebi_2_base[0];

Anyone have any thoughts?

We have determined why the processor halted, it appears that some unknown action occurred because an illegal EBI register value...

The nrd_pulse value was loaded with 65, but the nrd_cycle value was left at 90. The 90 cycle time was much smaller than the setup and pulse time. Processor did not like this apparently... caused a illegal instruction which was more of a by product of the mistake.

I know I said this before, but we be believe writing and reading is now working with our external memory. We ended up with these values.

EBI_CS_cfg_t cs0_cfg
{
// 180 ns access time
// ncs_rd_setup,nrd_setup, ncs_wr_setup, nwe_setup
// ncs_rd_pulse, nrd_pulse, ncs_wr_pulse, nwe_pulse
// nrd_cycles, nwe_cycles, tdf_cycles
2, 10, 2, 10,
40, 22, 40, 22,
32, 32, 0,
EBI_BUS_WIDTH_8,
EBI_BYTE_ACCESS_SELECT,
EBI_NWAIT_DISABLED,
EBI_WRITE_MODE_NWE,
EBI_READ_MODE_NRD
};
EBI_CS_cfg_t cs2_cfg
{
// 100 ns access time
// ncs_rd_setup,nrd_setup, ncs_wr_setup, nwe_setup
// ncs_rd_pulse, nrd_pulse, ncs_wr_pulse, nwe_pulse
// nrd_cycles, nwe_cycles, tdf_cycles
2, 10, 2, 10,
30, 12, 30, 12,
22, 22, 0,
EBI_BUS_WIDTH_8,
EBI_BYTE_ACCESS_SELECT,
EBI_NWAIT_DISABLED,
EBI_WRITE_MODE_NWE,
EBI_READ_MODE_NRD
};