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Nano carrier board documentation

Posted: Tue Nov 06, 2012 4:13 pm
by mwood
I can't seem to find any documentation that describes the P2 and P3 connectors on the Nano Carrier Board. Could someone please point me in the right direction?

Re: Nano carrier board documentation

Posted: Tue Nov 06, 2012 4:18 pm
by seulater
I dont know if i am allowed to send you the whole kit skiz, so i am just going to show P2 & P3.
Submit a ticket and i am sure they will send you it.

Re: Nano carrier board documentation

Posted: Tue Nov 06, 2012 4:34 pm
by mwood
Thanks.

Re: Nano carrier board documentation

Posted: Tue Nov 06, 2012 7:45 pm
by rnixon
Do you see a sch in the \nburn\docs\platform directory?

Re: Nano carrier board documentation

Posted: Thu Nov 08, 2012 4:51 pm
by dciliske
You'll note that on the current revision of the carrier board, the headers are odd/even swapped relative to the numbering on the actual Nano connector (as shown in seulater's post). This is planned to change in the next revision of the carrier board (most likely simply just a change in the silkscreen).

I hope that's not what prompted this question... :/

Re: Nano carrier board documentation

Posted: Sun Nov 11, 2012 6:47 pm
by mwood
Thanks for the input. It turns out that the last time I updated the IDE the schematic didn't show up in the docs/platform directory so I didn't know it was supposed to be there. I download and reinstalled the latest IDE and the schematic is present. All is well.