MOD5441X FlexBus

[roland.ames]

I am porting a project from MOD5234 to MOD5441X.
The target h/w has an external device attached to the FlexBus with CS on J1[6]. This means CS2 for the MOD5234 , CS4 for the MOD5441X.
This device uses an 8 bit port (on D24-D31 ), and has a 64kbyte memory map.

The problem is with the MOD5441X accessing this CS. The MOD5441X CSCR4 is configured with value 0x007FFC40. (CSAR4 = 0xC2000000, CSMR4 = 0x000001).When I access the external device for an 8-bit read (even or odd address) the value read is fine. If I access the external device for a 16-bit or 32-bit read, the FlexBus acts as if it was programmed as a 16bit port size. For a 16 bit read, only a single CS cycle is performed, for a 32 bit read, only 2 cycles.

Does anyone have any clues as to what is going wrong here.

I have found that when I do a 16 bit access the MOD5441X seems to do a 8 bit access of the address and then use that 8 bit value for both bytes of the word. I haven't yet tried a 16 bit access of an odd address.

I have also tried setting BEM in the CSCR, and executing J1[9].function( PINJ1_9_FB_BE2 ), J1[10].function( PINJ1_10_FB_BE2 ) . When I do this, neither of the j1[9] and j1[10] pins EVER goes low!!

I have tried the same with CS1 and CS5, no difference in the behaviour.

[pbreed]

From reference manual table 20-6
0x007FFC40

0000 0000 0111 1111 1111 1100 0100 000

This is
0000 00 31--26 SWS
00 reserved
0 SWSEN
1 EXTS
11 ASET
11 RDAH
11 WRAH
1111 11 WS
0 BLS
0 AA
01 PS <-8 bit...
0 BEM
0 BSTR
0 VSTW
000 res


My guess is that you need to turn AA on for this to work correctly...

So try

0x007FFD40

[roland.ames]

The external device generates /TA correctly, so I don't need to set AA.

I have successfully used a MOD5234 in the same target hardware, the MOD5234 CSCR is set to

#define DPRAM_SRWS 0
#define DPRAM_IWS 15
#define DPRAM_AA 0
#define DPRAM_PS 1 // 0 - 32 bit, 1 - 8 bit, 2 - 16 bit
#define DPRAM_BEM 0
#define DPRAM_BSTR 0
#define DPRAM_BSTW 0
#define DPRAM_SWWS 0


I will try setting the AA bit, to see if this changes the way the 16-bit bus access is performed.
EDIT: I have tried setting the AA bit, but this makes no difference!

Has anyone used the FlexBus interface on a MOD5441X with an 8bit port ? with or without AA.

[pbreed]

It sounds like you are seeing fewer transactions than you expected....

So I don't think its releated... but the byte steering strobes on the MOD54415 are wrong....

Freescale swapped the order ie 5270 3 = High byte 0=low byte 54415 3 =low byte 0 = hgih byte
We brought out bs3,2 when it should have been 0,1 so if you are using the byte steering write strobes they are wrong..
This should not be an issue for 8 bit bus mode...
(we are in the process of fixing this)

[roland.ames]

Thanks for that info on BE signals, this at least explains why I am not seeing either of BE2 or BE3 going active.

I would not normally even need to use these signals, I only enabled them to see what they were doing and maybe give me some clue as to what mode the FlexBus module was using for that chip select.

I have lodged a service request with freescale on this, anything I get from them I will pass on to this forum.

[roland.ames]

the reference manual 20.2.9:
External devices should only assert FB_TA while the FB_CSn signal to the
external device is asserted.
Because this device shares the FlexBus signals with the NAND flash
controller, this signal tristates between bus cycles.

Is the NAND flash controller used on the MOD5441X?
If my device doesn't tristate FB_TA between cycles, can this cause any problem?

[dciliske]

I'm not sure whether or not there's an issue if you don't tristate FB_TA, but the MOD5441X does not use the NAND flash controller.

[roland.ames]

Freescale swapped the order ie 5270 3 = High byte 0=low byte 54415 3 =low byte 0 = hgih byte
We brought out bs3,2 when it should have been 0,1 so if you are using the byte steering write strobes they are wrong..

As the FB_TSIZ signals are only available on these same pins, how is your address latch circuit going to work without access to these signals?

Can you explain how the address latch works. If I am accessing an 8 bit port for a 16 bit access, your address latch circuitry is responsible for incrementing the address presented on the A0-15 (J1[32] to j1[47]), and it looks to me like you must have access to the TSIZ signals to control this properly.


your MOD54415.pdf says:
"The MOD54415 provides 16 address lines (A0-A15) and a 16-bit data bus (D16-D31) running in mode 2. An address bus latch is included on the MOD54415 so you do not need to add an external latch."

Can you explain what "mode 2" means ?

Can I get a copy of the schematic of MOD5441X?

[roland.ames]

It sounds like you are seeing fewer transactions than you expected....

So I don't think its releated... but the byte steering strobes on the MOD54415 are wrong....

Freescale swapped the order ie 5270 3 = High byte 0=low byte 54415 3 =low byte 0 = hgih byte
We brought out bs3,2 when it should have been 0,1 so if you are using the byte steering write strobes they are wrong..
This should not be an issue for 8 bit bus mode...
(we are in the process of fixing this)

So the external bus cannot be used in 16-bit mode because the wrong BS signals are brought out
And the external bus does not appear to work in 8-bit mode....

SO,

Has anyone ever used the MOD5441X to access any external device on the FlexBus, and if so , how was it configured ?